This invention relates to a field effect transistor (FET) and, in particular, to a heterojunction field effect transistor (HJFET) such as a high electron mobility transistor (HEMT).
A heterojunction field effect transistor is typically fabricated by successively growing crystal layers on a semi-insulating substrate in the molecular beam epitaxy (MBE) process or the like. The hetero-junction field effect transistor comprises a buffer region, a channel layer, and a carrier supplying layer which are successively deposited on the principal surface of the semi-insulating substrate in this order. Both of the channel layer and the carrier supplying layer determine a characteristic of the heterojunction field effect transistor. The buffer region between the semi-insulating substrate and the channel layer has a secondary function for diffusion prevention of impurity in the substrate and for suppression of the short channel effect.
In a compound semiconductor such as GaAs, there is an interface level between the substrate and an epitaxial growth layer. The interface level has a time constant for response which is longer than one micro second and which is extremely larger than a speed of the transistor itself. As a result, parasitic phenomena occurs in the transistor that are, for example, frequency dispersion of drain conductance, hysteresis, drain lag and so on. Such phenomena are especially disadvantageous in a digital integrated circuit (IC) which is operable in a wide band including zero frequency, namely, a direct current (DC). It results in drastic degradation of operational speed of the transistor in design stage.
Similar phenomena occur in a metal semiconductor field effect transistor (MESFET) where the channel layer is directly formed in the semi-insulating substrate which includes a deep level. In order to eliminate such phenomena, a P-type layer is formed on a bottom surface of the channel layer in the MESFET. Such an MESFET is contributed by P. Canfield et al to IEEE ELECTRON DEVICE LETTERS, Vol. EDL-8, No. 3 (March 1987), pages 88-89, and which has a title of "Buried-Channel GaAs MESFET's with Frequency-Independent Output Conductance." In the MESFET, a threshold voltage rises due to introduction of the P-type layer. Such a rise of the threshold voltage is prevented by increasing of impurities in the channel layer.
However, in a heterojunction field effect transistor (HJFET) which uses charges supplied from the carrier supplying layer, the electron density in the channel layer is limited by the electron affinity of the carrier supplying layer. This introduction of the P-type layer in the HJFET results in a rise of the threshold voltage, an increment of resistance in both of source and drain electrodes, and so on, therefore such HJFET is not operable at high speed. In addition, when an N-type layer is used as the channel layer, a scattering of the impurities occurs and a characteristic of high electron mobility is therefore lost.